Boolean logic
| Truth Table (Inputs A, B → Output Z) |
|---|
| 0,0→0 | 0,1→0 | 1,0→0 | 1,1→1 |
| 0,0→0 | 0,1→1 | 1,0→1 | 1,1→1 |
| 0→1 | 1→0 |
| 0,0→1 | 0,1→1 | 1,0→1 | 1,1→0 |
| 0,0→1 | 0,1→0 | 1,0→0 | 1,1→0 |
| 0,0→0 | 0,1→1 | 1,0→1 | 1,1→0 |
- Text-based: Uses words like
AND,OR,NOT. Example:A AND B - Symbolic: Uses symbols like
∧(AND),∨(OR),¬or̅(NOT). Example:A ∧ BorA·B - Overline: A bar over the variable indicates NOT. Example:
Āor\bar{A}
Key Rule: When writing expressions, use parentheses ( ) to define the order of operations, just like in mathematics.
Law 1: The negation of an AND operation is equivalent to the OR of the negations.
\overline{A \cdot B} = \bar{A} + \bar{B}
(NOT (A AND B) is the same as (NOT A) OR (NOT B))
Law 2: The negation of an OR operation is equivalent to the AND of the negations.
\overline{A + B} = \bar{A} \cdot \bar{B}
(NOT (A OR B) is the same as (NOT A) AND (NOT B))
Why this matters: These laws allow you to replace a complex gate combination with a simpler one, or to convert a circuit into one using only NAND gates (which are universal).
- Inputs A and B go into an AND gate.
- Input C goes into a NOT gate.
- The outputs of step 1 and step 2 go into an OR gate.
Step-by-step Derivation:
- Identify the first layer:
A AND B→(A AND B) - Identify the second layer:
NOT C→(NOT C)or(\bar{C}) - Identify the final layer: The outputs of 1 and 2 go into an OR gate.
Final Expression:
(A \text{ AND } B) \text{ OR } (\text{NOT } C)
Or symbolically:
(A \cdot B) + \bar{C}
Complex Example: Derive the expression for Z = (\text{NOT } A \text{ OR } B) \text{ AND } (B \text{ XOR } C).
- Break it down by brackets:
- Part 1:
NOT A OR B→ (\bar{A} + B) - Part 2:
B XOR C→ (B \oplus C)
- Part 1:
- Combine with the central operator (AND):
Z = (\bar{A} + B) \cdot (B \oplus C)
Question: Complete the truth table for Z = A \text{ NAND } (B \text{ OR } C).
Strategy: Work from left to right, creating intermediate columns if necessary.
- Inputs: List all 8 combinations of A, B, C (000 to 111).
- Intermediate Column 1 (B \text{ OR } C):
- If B=0, C=0 → Output 0
- Otherwise → Output 1
- Final Column (A NAND Intermediate):
- Recall: NAND is 0 only if BOTH inputs are 1.
- Input A and Intermediate must both be 1 for Z to be 0.
| A | B | C | B OR C | A NAND (B OR C) |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 1 | 1 |
| 0 | 1 | 0 | 1 | 1 |
| 0 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 |
Correct Understanding: Cambridge examiners award marks for distinctive shape.
- The AND gate must have a flat back and curved front.
- The OR gate must have a curved back and pointed front.
- The NOT gate is a triangle with a circle (bubble) at the tip.
- NAND/NOR/XOR must clearly show the base gate plus the distinguishing feature (extra line for XOR, bubble for NAND/NOR).
Why this matters: If the gate shape is ambiguous, the examiner cannot verify your logic. Always draw large, clear symbols.
Error: The final output column is the exact opposite of the correct answer (all 0s become 1s and vice versa).
Correct Understanding: This usually happens when you forget a NOT operation or misinterpret a NAND/NOR gate.
- Remember: NAND is the inverse of AND. If AND gives 1, NAND gives 0.
- Double-check the last gate in your circuit. If it ends in a bubble (NOT), invert your previous result.
Examiner Acceptance: Examiners accept expressions that clearly show the order of operations. Use parentheses ( ) to group inputs for each gate. For example, (A AND B) OR C is clearer than A AND B OR C because it removes ambiguity about whether A is ANDed with (B OR C) or (A AND B).
Reasoning: This directly addresses the requirement for unambiguous logical structure. Without parentheses, the precedence of operations might be misinterpreted.
Example: For a circuit where A and B are ANDed, then that result is ORed with C, write: (A AND B) OR C. Do not write A AND B OR C unless you are certain of standard precedence rules, as it risks ambiguity.
Context: When asked to simplify an expression or convert a circuit to use only NAND gates.
Examiner Acceptance: Examiners look for the correct application of the rule: 'Break the bar, change the sign.'
- If you have \overline{A \cdot B}, break the bar over A and B, and change AND (\cdot) to OR (+). Result: \bar{A} + \bar{B}.
- If you have \overline{A + B}, break the bar over A and B, and change OR (+) to AND (\cdot). Result: \bar{A} \cdot \bar{B}.
Reasoning: This demonstrates understanding of logical equivalence. Simply stating the law without applying it correctly will not gain marks.
Example: Simplify \overline{(A \text{ OR } B) \text{ AND } C}.
- Apply De Morgan's to the outer AND: \overline{(A \text{ OR } B)} + \bar{C}
- Apply De Morgan's to the inner OR: (\bar{A} \cdot \bar{B}) + \bar{C}
The circuit must contain:
- A NOT gate with input A.
- An OR gate with inputs from step 1 and input B.
- An XOR gate with inputs B and C.
- An AND gate taking the outputs from step 2 and step 3 as its inputs.
- All connections must be correct.
Or symbolically: Z = (A \cdot B) + \bar{C}
| A | B | Z |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
(Note: NOR is 1 only when both inputs are 0)
(Break the bar, change AND to OR)